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Present status of three-dimensional television research
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| Pengarang | : | T. Motoki |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-7, JULY (No. 7) |
| Halaman | : | 1009-1021 |
| Abstrak | : | Television that conveys real-time information has become an indispensable part of our lives. Its technology has advanced from the days of black-and-white sets to color models and to high-definition television (HDTV). HDTV has been contrived to provide the audience with greater immediate appeal such as sensation of reality and power than the current TV system does and its worldwide applications are expected to continue to grow. Real world information which we obtain with our eyes is three-dimensional. It is reasonable therefore, that we humans want an imaging system that produces pictures that are as natural and real as things we see and experience every day. Three-dimensional television (3DTV) is a very promising approach expected to satisfy such wishes. As television technology matures and HDTV produces pictures as clear as movies, 3DTV is now capable of providing real-time stereoscopic pictures with high resolution. This paper outlines the studies that have been carried out about 3DTV as a post-HDTV system. The themes of the paper are focused to such topics as human factors in relation to binocular parallax, camera and display systems, and bandwidth reduction technology. |
Batteries for low power electronics
| Pengarang | : | - |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 687-693 |
| Abstrak | : | Progress in battery technology is closely tied to that in electronics, however, it is slow in comparison. Growth in new systems once in production, is also slow, depending upon the development of new devices which need their performance characteristics. This has been true, in particular for lithium cells operating at 3 V. Older electrochemical systems such as C-Zn, alkaline, Zn-air, NiCd, and lead-acid continue to get better, and maintain the market for devices which can use them. Primary lithium batteries are growing in use as new devices are designed around their higher voltage and superior shelf life. The Li-MnO/sub 2/ system dominates the commercial marker. At least 16 manufacturers produce many sizes and configurations from high rate "D" cells to 50 mAh thin, flat cells. Two new secondary (rechargeable) systems, nickel-metal hydride and lithium ion, have recently been introduced They are growing at a rapid rate in response to environmental concerns and the need for higher energy density. Other secondary systems such as Zn-air and lithium-polymer electrolyte are nearing commercial production. Environmental regulations continue to impact battery use and disposal, leading to more interest in secondary systems which can be reused many times before disposal. Mercury has largely been banned from use in primary batteries, both as a corrosion inhibitor for zinc and as a cathode in the mercuric oxide cell. Existing and emerging battery systems are discussed in terms of energy content, shelf and cycle life and other characteristics. |
Trends and limits in the "Talk times" of personal communicators
| Pengarang | : | C.W. Warwick |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 681-686 |
| Abstrak | : | In the past, telecommunications and computing have only been possible within a few feet from a telephone jack or an AC outlet. The user interface has required hand-eye coordination, full user attention, and a working surface to operate, for example, a telephone keypad a keyboard or a mouse. Now, "personal communicators" with wireless connectivity, energy efficient electronics novel user interfaces, and advanced battery technology promise to cut these tethers, and to offer convenient and natural communication and computation anytime, anywhere. This article provides simple estimates for the energy budget for personal communicators and its evolution as technology matures. In outline, we assume personal communicators will mimic the size and weight of successful, portable objects, such as paper notebooks. From the weight, the fraction of the weight devoted to batteries, and the specific energy of modern rechargeable batteries, we estimate the energy available. Since it is desirable for this energy to last a full working day of heavy use, one can estimate the average power the communicator will draw. Observation of people using computers and telephones gives us a typical "usage profile" describing the time spent viewing the display, computing, and/or communicating. The functionality required in each mode lends us to an estimate of the power drawn in each mode, and its trend in time. Thus human-machine interfaces will become increasingly natural and attractive. |
Portable video on demand in wireless communication
| Pengarang | : | - |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 659-680 |
| Abstrak | : | Our present ability to work with video has been confined to a wired environment, requiring both the video encoder and decoder to be physically connected to a power supply and a wired communication link. This paper describes an integrated approach to the design of a portable video-on-demand system capable of delivering high-quality image and video data in a wireless communication environment. The discussion will focus on both the algorithm and circuit design techniques developed for implementing a low-power video compression/decompression system at power levels that are two orders of magnitude below existing solutions. This low-power video compression system not only provides a compression efficiency similar to industry standards, but also maintains a high degree of error tolerance to guard against transmission errors often encountered in wireless communication. The required power reduction can best be attained through reformulating compression algorithms for energy conservation. We developed an intra-frame compression algorithm that requires minimal computation energy in its hardware implementations. |
Technology directions for portable computers
| Pengarang | : | - |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 636-658 |
| Abstrak | : | This paper contains an evaluation of trends in the key system parameters (e.g., size, weight, function, performance, battery life) for battery-powered portable computers, together with a review of development trends in the technologies required for such systems. The discussion focuses on notebook-size portable computers. Those technologies which will have substantial impact on battery life and power budgets of future notebook computers receive the primary emphasis in this paper for example, liquid crystal displays, storage technology, wireless communication technology, and low power electronics. System power management is also be addressed. The basic theme of this paper is first to develop a view of what the key attributes of future notebook computers will be, and then to discuss how technologies must evolve to allow such systems to be advanced over the current state of the art in terms of portability and battery life. |
Low power microelectronics: retrospect and prospect
| Pengarang | : | - |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 619-635 |
| Abstrak | : | The era of low power microelectronics began with the invention of the transistor in the late 1940's and came of age with the invention of the integrated circuit in the late 1950's. Historically, the most demanding applications of low power microelectronics have been battery operated products such as wrist watches, hearing aids, implantable cardiac pacemakers, pocket calculators, pagers, cellular telephones and prospectively the hand-held multi-media terminal However, in the early 1990's low power microelectronics rapidly evolved from a substantial tributary to the mainstream of microelectronics. The principal reasons for this transformation were the increasing packing density of transistors and increasing clock frequencies of CMOS microchips pushing heat removal and power distribution to the forefront of the problems confronting the advance of microelectronics. The distinctive thesis of this discussion is that future opportunities for low power gigascale integration (GSI) will be governed by a hierarchy of theoretical and practical limits whose levels can be codified as: (1) fundamental, (2) material, (3) device, (4) circuit, and (5) system. |
Technology leverage for ultra-low power information systems
| Pengarang | : | J.M.C. Stork |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 607-618 |
| Abstrak | : | Many applications for future generations of logic and memory chips will be requiring highly sophisticated computing functions at low cost. Small form factors, portability, and low cost will require low power operation. While continued scaling of silicon technology to dimensions below quarter micron devices and interconnections appears technically feasible, higher levels of integration and operation at higher speed have been driving the power consumption of logic chips up instead of down. This paper discusses how scaled submicron silicon technology can provide leverage to reduce power, while gaining in throughput for logic chips, and in capacity for memory functions. Strong reductions in voltage supply have to accompany shrinking dimensions. Materials limits such as tunneling currents through ultra-thin silicon-dioxide gate dielectrics and electromigration in minimum pitch interconnections emerge to be key challenges to realize low power 0.1 /spl mu/m level CMOS circuits. A more than 10/spl times/ gain in productivity as measured by the energy*delay product can be realized by shrinking from 0.5-0.125 /spl mu/m CMOS device technology. |
CMOS scaling for high performance and low power-the next ten years
| Pengarang | : | B. Davari |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 595-606 |
| Abstrak | : | A guideline for scaling of CMOS technology for logic applications such as microprocessors is presented covering the next ten years, assuming that the lithography and base process development driven by DRAM continues on the same three-year cycle as in the past. This paper emphasizes the importance of optimizing the choice of power-supply voltage. Two CMOS device and voltage scaling scenarios are described. One optimized for highest speed and the other trading off speed improvement for much lower power. It is shown that the low power scenario is quite close to the original constant electric-field scaling theory. CMOS technologies ranging from 0.25 /spl mu/m channel length at 2.5 V down to sub-0.1 /spl mu/m at 1 V are presented and power density is compared for the two scenarios. Scaling of the threshold voltage along with the power supply voltage will lead to a substantial rise in standby power compared to active power and some tradeoffs of performance and/or changes in design methods must be made. Key technology elements and their impact on scaling are discussed. It is shown that a speed improvement of about 7/spl times/ and over two orders of magnitude improvement in power-delay product (mW/MIPS) are expected by scaling of bulk CMOS down to the sub-0.1 /spl mu/m regime as compared with today's high performance 0.6 /spl mu/m devices at 5 V. However, the power density rises by a factor of 4/spl times/ for the high-speed scenario. The status of the silicon-on-insulator (SOI) approach to scaled CMOS is also reviewed, showing the potential for about 3/spl times/ savings in power compared to the bulk case at the same speed. |
Power conscious CAD tools and methodologies: a perspective
| Pengarang | : | - |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 570-594 |
| Abstrak | : | Power consumption is rapidly becoming an area of growing concern in IC and system design houses. Issues such as battery life, thermal limits, packaging constraints and cooling options are becoming key factors in the success of a product. As a consequence, IC and system designers are beginning to see the impact of power on design area, design speed, design complexity and manufacturing cost. While process and voltage scaling can achieve significant power reductions, these are expensive strategies that require industry momentum, that only pay off in the long run. Technology independent gains for power come from the area of design for low power which has a much higher return on investment (ROI). But low power design is not only a new area but is also a complex endeavour requiring a broad range of synergistic capabilities from architecture/microarchitecture design to package design. It changes traditional IC design from a two-dimensional problem (Area/performance) to a three-dimensional one (Area/Performance/Power). This paper describes the CAD tools and methodologies required to effect efficient design for low power. It is targeted to a wide audience and tries to convey an understanding of the breadth of the problem. It explains the state of the art in CAD tools and methodologies. The paper is written in the form of a tutorial, making it easy to read by keeping the technical depth to a minimum while supplying a wealth of technical references. Simultaneously the paper identifies unresolved problems in an attempt to incite research in these areas. Finally an attempt is made to provide commercial CAD tool vendors with an understanding of the needs and time frames for new CAD tools supporting low power design. |
Low-power radio-frequency ICs for portable communications
| Pengarang | : | - |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 83-4, APRIL (No. 4) |
| Halaman | : | 544-569 |
| Abstrak | : | The contributions of integrated circuits to the RF front-end of wireless receivers and transmitters operating in broadcast and personal communications bands are surveyed. It is seen from this that when ICs enable a rethinking of the RF architecture, the wireless device can sometimes become significantly smaller, and consume much less power. Examples are taken from FM broadcast receivers, pagers, and cellular telephone handsets. Many semiconductor technologies are competing today to supply RF-ICs to cellular telephones. The various design styles and levels of integration are compared, with the conclusion that single-chip silicon transceivers, combined with architectures which substantially reduce off-chip passive components, will likely dominate digital cellular telephones in the near future. The survey also projects future trends for ICs for miniature spread-spectrum transceivers offering robust operation in the crowded spectrum. With sophistication in baseband digital signal processing, its increasing interaction with the RF sections, and with increasing experience in simplified radio architectures, all-CMOS radios appear promising in the 900 MHz to 2 GHz bands. A specific CMOS spread-spectrum transceiver project underway at the author's institution is discussed by way of example. |