
| Pengarang | : | Walid Saad; Omar Hashash; at. al |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 9) |
| Halaman | : | 849-887 |
| Abstrak | : | Building the next-generation wireless systems that could support services such as the metaverse, digital twins (DTs), and holographic teleportation is challenging to achieve exclusively through incremental advances to conventional wireless technologies like metasurfaces or holographic antennas. While the 6G concept of artificial intelligence (AI)-native networks promises to overcome some of the limitations of existing wireless technologies, current developments of AI-native wireless systems rely mostly on conventional AI tools such as auto-encoders and off-the-shelf artificial neural networks. However, those tools struggle to manage and cope with the complex, nontrivial scenarios faced in real-world wireless environments and the growing quality-of-experience (QoE) requirements of the aforementioned, emerging wireless use cases. In contrast, in this article, we propose to fundamentally revisit the concept of AI-native wireless systems, equipping them with the common sense necessary to transform them into artificial general intelligence (AGI)-native systems. Our envisioned AGI-native wireless systems acquire common sense by exploiting different cognitive abilities such as reasoning and analogy. These abilities in our proposed AGI-native wireless system are mainly founded on three fundamental components: a perception module, a world model, and an action-planning component. Collectively, these three fundamental components enable the four pillars of common sense that include dealing with unforeseen scenarios through horizontal generalizability, capturing intuitive physics, performing analogical reasoning, and filling in the blanks. Toward developing these components, we start by showing how the perception module can be built through abstracting real-world elements into generalizable representations. These representations are then used to create a world model, founded on principles of causality and hyperdimensional (HD) computing. Specifically, we propose a concrete definition of a world model, viewing it as an HD causal vector space that aligns with the intuitive physics of the real world—a cornerstone of common sense. In addition, we discuss how this proposed world model can enable analogical reasoning and manipulation of the abstract representations. Then, we show how the world model can drive an action-planning feature of the AGI-native network. In particular, we propose an intent-driven and objective-driven planning method that can maneuver the AGI-native network to plan its actions. These planning methods are based on brain-inspired frameworks such as integrated information theory and hierarchical abstractions that play a crucial role in enabling human-like decision-making. Next, we explain how an AGI-native network can be further exploited to enable three use cases related to human users and autonomous agent applications: 1) analogical reasoning for the next-generation DTs; 2) synchronized and resilient experiences for cognitive avatars; and 3) brain-level metaverse experiences exemplified by holographic teleportation. Finally, we conclude with a set of recommendations to ignite the quest for AGI-native systems. Ultimately, we envision this article as a roadmap for the next generation of wireless systems beyond 6G. |
| Pengarang | : | Anders E. Kalør; Giuseppe Durisi; Sinem Coleri, at. all |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 9) |
| Halaman | : | 826-848 |
| Abstrak | : | Compared to the generations up to 4G, whose main focus was on broadband and coverage aspects, 5G has expanded the scope of wireless cellular systems toward embracing two new types of connectivity: massive machine-type communications (mMTCs) and ultrareliable low-latency communications (URLLCs). This article discusses the possible evolution of these two types of connectivity within the umbrella of 6G wireless systems. This article consists of three parts. The first part deals with the connectivity for a massive number of devices. While mMTC research in 5G predominantly focuses on the problem of uncoordinated access in the uplink for a large number of devices, the traffic patterns in 6G may become more symmetric, leading to closed-loop massive connectivity. One of the drivers for this type of traffic pattern is distributed/decentralized learning and inference. The second part of this article discusses the evolution of wireless connectivity for critical services. While latency and reliability are tightly coupled in 5G, 6G will support a variety of safety-critical control applications with different types of timing requirements, as evidenced by the emergence of metrics related to information freshness and information value. In addition, ensuring ultrahigh reliability for safety-critical control applications requires modeling and estimation of the tail statistics of the wireless channel, queue length, and delay. The fulfillment of these stringent requirements calls for the development of novel artificial intelligence (AI)-based techniques, incorporating optimization theory, explainable AI (XAI), generative AI, and digital twins (DTs). The third part analyzes the coexistence of massive connectivity and critical services. Specifically, we consider scenarios in which a massive number of devices need to support traffic patterns of mixed criticality. This is followed by a discussion about the management of wireless resources shared by services with different criticality. |
| Pengarang | : | |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 9) |
| Halaman | : | 823-825 |
| Abstrak | : | The first part of this Special Issue on 6G outlined some key technological directions and emerging research themes driving the evolution toward the next-generation wireless systems. Part I highlighted the tremendous momentum in topics such as intelligent surfaces, joint communication and sensing, cell-free massive multiple-input–multiple-output (MIMO) systems, artificial intelligence (AI)-native system design, and emerging multiple-access techniques, showcasing both the maturity of these research tracks and their central role in shaping future 6G architectures. |
| Pengarang | : | Yang Ji; Ying Sun; Yuting Zhang; Zhigaoyuan Wang |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 8) |
| Halaman | : | 783-813 |
| Abstrak | : | Neural networks have achieved remarkable success across various fields. However, the lack of interpretability limits their practical use, particularly in critical decision-making scenarios. Posthoc interpretability, which provides explanations for pretrained models, is often at risk of fidelity and robustness. This has inspired a rising interest in self-interpretable neural networks (SINNs), which inherently reveal the prediction rationale through model structures. Despite this progress, existing research remains fragmented, relying on intuitive designs tailored to specific tasks. To bridge these efforts and foster a unified framework, we first collect and review existing works on SINNs and provide a structured summary of their methodologies from five key perspectives: attribution-based, function-based, concept-based, prototype-based, and rule-based self-interpretation. We also present concrete, visualized examples of model explanations and discuss their applicability across diverse scenarios, including image, text, graph data, and deep reinforcement learning (DRL). Additionally, we summarize existing evaluation metrics for self-interpretation and identify open challenges in this field, offering insights for future research. To support ongoing developments, we present a publicly accessible resource to track advancements in this domain: https://github.com/yangji721/Awesome-Self-Interpretable-Neural-Network |
| Pengarang | : | Zecai Lin; Cheng Zhou; Shaoping Huang |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 8) |
| Halaman | : | 752-782 |
| Abstrak | : | Deformation of flexible robots can be practically assessed using extension/compression, shear, curvature, and torsion. Sensing based on one or more of the above characteristics enables closed-loop control for delicate tasks that require precision and dexterity. Due to the increasing popularity of flexible robotics in recent years, significant research effort has been directed to this burgeoning field. Although numerous studies have addressed soft sensing technologies, their successful integration into flexible robotic systems remains limited. This article provides a comprehensive review of sensing methods, from multidimensional deformation to the underlying principles of deriving hard-to-measure deformation from surrogate parameters. It focuses on sensing modalities such as strain measurement via piezoelectric, capacitive, resistive, and optical techniques. The applications of deformation sensing in industrial and service robotics are described. Future challenges and potential research issues including resolution, conformability, multifunctionality, crosstalk, and miniaturization are discussed. The need for a synergistic approach across disciplines is highlighted, emphasizing the integration of new materials, microstructures, advanced manufacturing technologies, and state-of-the-art signal processing techniques. |
| Pengarang | : | Luís Crespo; Nuno Neves |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 8) |
| Halaman | : | 713-751 |
| Abstrak | : | In the past few years, there has been a renewed effort to advance general-purpose architectures. In particular, to deliver performance and energy efficiency advantages, several techniques have been applied based on new forms of specialization while maintaining usability. As a result, data movement and communication have become the primary bottlenecks in computer systems. To overcome this, one of the most recent breakthroughs has been the introduction of data streaming mechanisms, just like those used in accelerators, into modern general-purpose processors (GPPs). This article comprehensively reviews stream-based architectures, tracing their development from accelerator solutions to their recent adoption in GPPs. This survey starts by introducing the fundamental principles of stream specialization, followed by a taxonomy for memory accesses, and formal mathematical models to represent them as data streams. Then, it categorizes different topologies of data stream specialization and examines them from a compiler’s perspective. Some of the most representative architectures proposed in the past few years, including instruction set architecture (ISA) and streaming engines, are described, followed by a comparative analysis that highlights their key features and presents quantitative evaluations. Then, we discuss some open challenges and suggest directions for future research in stream-based architectures. |
| Pengarang | : | Peter M. Grant; John S. Thompson; Simon Watts |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 7) |
| Halaman | : | 693-706 |
| Abstrak | : | In February 1935, the Daventry radar experiment, led by Robert Watson-Watt, detected the presence of an aircraft by using reflected radio waves [1]. Later that year, the Chain Home radar system design started [1], with the first installation in 1938 covering the approaches to the Thames Estuary. This enabled the detection of incoming aircraft at 160-km range and directed interception fighters to within 6.5 km of the target. This system used 100- kW–1-MW high-energy pulses generated at 20–50 MHz and was later extended to cover the U.K. east and south coasts as well as parts of the west coast. Compared to today’s microwave radar systems, this was a basic design with wooden and steel towers supporting the physically large high-frequency (HF) antennas. |
| Pengarang | : | Tom Backstrom |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 7) |
| Halaman | : | 668-692 |
| Abstrak | : | Speech technology for communication, accessing information, and services has rapidly improved in quality. It is convenient and appealing because speech is the primary mode of communication for humans. Such technology, however, also presents proven threats to privacy. Speech is a tool for communication, and thus, it will inherently contain private information. Importantly, it also contains a wealth of side information, including details about health, emotions, affiliations, and relationships, all of which are private. Exposing such private information can lead to serious threats such as price gouging, harassment, extortion, and stalking. This article is a tutorial on privacy issues related to speech technology, modeling their threats, approaches for protecting users’ privacy, measuring the performance of privacy-protecting methods, perception of privacy, as well as societal and legal consequences. In addition to a tutorial overview, it also presents lines for further development where improvements are most urgently needed. |
| Pengarang | : | Swaroop Ghosh; Suryansh Upadhyay; Abdullah Ash Saki |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 7) |
| Halaman | : | 640-667 |
| Abstrak | : | Quantum computing (QC) is an emerging paradigm with the potential to transform numerous application domains by addressing classically intractable problems. However, its growing presence in cyberspace has introduced new security and privacy challenges. Similar to classical computing systems, the QC stack including software and hardware relies extensively on third parties, many of which are emerging and trust-seeking or less-trusted. This stack often contains sensitive intellectual property (IP) that demands protection. Unique features of quantum systems can enable classical-style attacks: for instance, crosstalk in multitenant settings can facilitate fault-injection attacks, while malicious calibration services can misreport error rates or miscalibrate qubits to induce denial-of-service (DoS) conditions. Given the high cost and limited availability of likely trustworthy quantum hardware, users may be enticed to explore emerging and trust-seeking but cheaper and readily available quantum hardware, which can enable the stealth of IP and tampering of quantum programs and/or computation outcomes. Similarly, emerging compilation services may compromise circuit confidentiality or insert Trojans. Despite the strategic significance of QC and its potential to process sensitive information, its security and privacy concerns remain underexplored. This article presents a comprehensive overview of QC fundamentals, key vulnerabilities, recent attack vectors, and corresponding defenses, and concludes with directions for future research to strengthen the quantum security community. |
| Pengarang | : | Andrew Boutros; Aman Arora; Vaughn Betz |
| Nama Majalah/Jurnal | : | Proceedings of the IEEE |
| Volume / Edisi | : | 113 (No. 7) |
| Halaman | : | 613-639 |
| Abstrak | : | Deep learning (DL) is becoming the cornerstone of numerous applications both in large-scale datacenters and at the edge. Specialized hardware is often necessary to meet the performance requirements of state-of-the-art DL models, but the rapid pace of change in DL models and the wide variety of systems integrating DL make it impossible to create custom computer chips for all but the largest markets. Field-programmable gate arrays (FPGAs) present a unique blend of reprogrammability and direct hardware execution that make them suitable for accelerating DL inference. They offer the ability to customize processing pipelines and memory hierarchies to achieve lower latency and higher energy efficiency compared to general-purpose central processing units (CPUs) and graphics processing units (GPUs), at a fraction of the development time and cost of custom chips. Their diverse and high-speed inputs/outputs (IOs) also enable directly interfacing the FPGA to the network and/or a variety of external sensors, making them suitable for both datacenter and edge use cases. As DL has become an ever more important workload, FPGA architectures are evolving to enable higher DL performance. In this article, we survey both academic and industrial FPGA chip architecture enhancements for DL. First, we give a brief introduction on the basics of FPGA architecture and how its components lead to strengths and weaknesses for DL applications. Next, we discuss different design styles of DL inference accelerators implemented on FPGAs that achieve state-of-the-art performance and productive development flows, ranging from model-specific dataflow styles to software-programmable overlay styles. We survey DL-specific enhancements to traditional FPGA building blocks including the logic blocks (LBs), arithmetic circuitry, and on-chip memories, as well as new DL-specialized blocks that integrate into the FPGA fabric to accelerate tensor computations. Finally, we discuss hybrid devices that combine processors and coarse-grained accelerator blocks with FPGA-like interconnect and networks-on-chip (NoCs), and highlight promising future research directions. |